Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	5424	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6385	1			T1	2		T18	24		T9	3
len_5001_7500	11154	1			T1	5		T18	24		T38	33
len_2501_5000	6644	1			T18	24		T38	34		T39	24
len_1025_2500	3924	1			T1	4		T18	14		T38	20
len_769_1024	5793	1			T18	2		T7	35		T8	39
len_513_768	6198	1			T18	3		T7	35		T8	39
len_257_512	11190	1			T18	2		T7	21		T8	48
len_0_256	128801	1			T3	9		T18	211		T37	9
len_keccak_block_sizes[72]	499	1			T18	2		T38	2		T9	1
len_keccak_block_sizes[104]	404	1			T18	2		T39	2		T41	3
len_keccak_block_sizes[136]	294	1			T41	3		T157	2		T19	1
len_keccak_block_sizes[144]	212	1			T41	3		T157	2		T158	3
len_keccak_block_sizes[168]	129	1			T41	3		T158	3		T20	1
len_1	518	1			T18	2		T38	2		T39	2
len_0	952	1			T18	2		T38	2		T39	2