Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	5099	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	5834	1			T15	33		T32	19		T33	38
len_5001_7500	10536	1			T2	1		T15	105		T32	18
len_2501_5000	6449	1			T15	13		T32	18		T33	36
len_1025_2500	3765	1			T15	12		T32	11		T33	22
len_769_1024	6178	1			T3	34		T15	1		T20	25
len_513_768	6491	1			T2	2		T3	24		T15	1
len_257_512	11464	1			T2	5		T3	31		T20	27
len_0_256	119799	1			T2	36		T3	32		T15	23
len_keccak_block_sizes[72]	489	1			T3	1		T32	2		T33	3
len_keccak_block_sizes[104]	388	1			T32	2		T30	1		T33	3
len_keccak_block_sizes[136]	288	1			T32	2		T30	1		T33	3
len_keccak_block_sizes[144]	190	1			T33	3		T39	2		T187	2
len_keccak_block_sizes[168]	129	1			T33	3		T188	3		T36	1
len_1	523	1			T32	2		T33	3		T39	2
len_0	907	1			T15	9		T32	2		T33	3