Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	628	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5230	1			T2	6		T3	16		T15	27
len_601_800	11986	1			T2	2		T3	31		T15	65
len_401_600	7882	1			T2	1		T3	29		T15	50
len_201_400	7493	1			T2	2		T3	13		T15	18
len_65_200	27496	1			T2	17		T3	5		T15	15
len_min_for_xof_require_squeeze	352	1			T33	10		T84	1		T188	9
len_keccak_block_sizes[72]	276	1			T2	1		T3	1		T33	5
len_keccak_block_sizes[104]	298	1			T33	5		T189	1		T188	9
len_keccak_block_sizes[136]	281	1			T33	5		T83	1		T189	1
len_keccak_block_sizes[144]	110	1			T33	5		T186	1		T190	5
len_keccak_block_sizes[168]	103	1			T20	1		T33	5		T6	1
len_datapath_width	13582	1			T2	1		T15	1		T31	3
len_2_63	106667	1			T2	22		T3	10		T15	2
len_1	46	1			T38	1		T6	1		T189	1