Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	6061	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6360	1			T1	24		T2	6		T6	3
len_5001_7500	11253	1			T1	24		T2	10		T6	9
len_2501_5000	6942	1			T1	24		T2	6		T6	1
len_1025_2500	4058	1			T1	14		T2	1		T6	2
len_769_1024	5724	1			T1	2		T12	54		T4	39
len_513_768	6039	1			T1	3		T12	49		T4	36
len_257_512	12784	1			T1	2		T2	1		T12	50
len_0_256	138488	1			T1	211		T2	3		T6	1
len_keccak_block_sizes[72]	521	1			T1	2		T40	2		T41	2
len_keccak_block_sizes[104]	430	1			T1	2		T12	2		T4	1
len_keccak_block_sizes[136]	334	1			T41	2		T43	3		T107	2
len_keccak_block_sizes[144]	237	1			T41	2		T43	3		T13	1
len_keccak_block_sizes[168]	150	1			T43	3		T156	1		T24	2
len_1	555	1			T1	2		T40	2		T41	2
len_0	926	1			T1	2		T6	1		T4	4