Summary for Variable entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
225134 | 
1 | 
 | 
 | 
T1 | 
2 | 
 | 
T2 | 
748 | 
 | 
T3 | 
2 | 
| auto[1] | 
176972 | 
1 | 
 | 
 | 
T1 | 
746 | 
 | 
T7 | 
26 | 
 | 
T35 | 
4672 | 
Summary for Variable prescaler_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for prescaler_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
101091 | 
1 | 
 | 
 | 
T1 | 
178 | 
 | 
T2 | 
237 | 
 | 
T20 | 
22 | 
| lower_val | 
99670 | 
1 | 
 | 
 | 
T1 | 
187 | 
 | 
T2 | 
180 | 
 | 
T20 | 
15 | 
| zero_val | 
1410 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
1 | 
 | 
T3 | 
1 | 
Summary for Variable wait_timer_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for wait_timer_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
156178 | 
1 | 
 | 
 | 
T1 | 
198 | 
 | 
T2 | 
354 | 
 | 
T3 | 
2 | 
| lower_val | 
157288 | 
1 | 
 | 
 | 
T1 | 
182 | 
 | 
T2 | 
394 | 
 | 
T20 | 
34 | 
| zero_val | 
88640 | 
1 | 
 | 
 | 
T1 | 
368 | 
 | 
T7 | 
10 | 
 | 
T35 | 
2260 | 
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
18 | 
0 | 
18 | 
100.00 | 
 | 
Automatically Generated Cross Bins for entropy_timer_cross
Bins
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
higher_val | 
auto[0] | 
28273 | 
1 | 
 | 
 | 
T2 | 
118 | 
 | 
T20 | 
13 | 
 | 
T37 | 
55 | 
| higher_val | 
higher_val | 
auto[1] | 
11033 | 
1 | 
 | 
 | 
T1 | 
51 | 
 | 
T7 | 
6 | 
 | 
T35 | 
304 | 
| higher_val | 
lower_val | 
auto[0] | 
28364 | 
1 | 
 | 
 | 
T2 | 
119 | 
 | 
T20 | 
9 | 
 | 
T37 | 
51 | 
| higher_val | 
lower_val | 
auto[1] | 
11236 | 
1 | 
 | 
 | 
T1 | 
44 | 
 | 
T7 | 
4 | 
 | 
T35 | 
330 | 
| higher_val | 
zero_val | 
auto[0] | 
72 | 
1 | 
 | 
 | 
T7 | 
1 | 
 | 
T43 | 
1 | 
 | 
T9 | 
1 | 
| higher_val | 
zero_val | 
auto[1] | 
22113 | 
1 | 
 | 
 | 
T1 | 
83 | 
 | 
T7 | 
1 | 
 | 
T35 | 
601 | 
| lower_val | 
higher_val | 
auto[0] | 
27743 | 
1 | 
 | 
 | 
T2 | 
79 | 
 | 
T20 | 
8 | 
 | 
T37 | 
33 | 
| lower_val | 
higher_val | 
auto[1] | 
11060 | 
1 | 
 | 
 | 
T1 | 
42 | 
 | 
T35 | 
334 | 
 | 
T34 | 
24 | 
| lower_val | 
lower_val | 
auto[0] | 
27710 | 
1 | 
 | 
 | 
T2 | 
101 | 
 | 
T20 | 
7 | 
 | 
T34 | 
1 | 
| lower_val | 
lower_val | 
auto[1] | 
11115 | 
1 | 
 | 
 | 
T1 | 
46 | 
 | 
T7 | 
1 | 
 | 
T35 | 
300 | 
| lower_val | 
zero_val | 
auto[0] | 
73 | 
1 | 
 | 
 | 
T87 | 
1 | 
 | 
T8 | 
4 | 
 | 
T187 | 
1 | 
| lower_val | 
zero_val | 
auto[1] | 
21969 | 
1 | 
 | 
 | 
T1 | 
99 | 
 | 
T35 | 
572 | 
 | 
T34 | 
53 | 
| zero_val | 
higher_val | 
auto[0] | 
451 | 
1 | 
 | 
 | 
T3 | 
1 | 
 | 
T37 | 
1 | 
 | 
T41 | 
1 | 
| zero_val | 
higher_val | 
auto[1] | 
87 | 
1 | 
 | 
 | 
T35 | 
3 | 
 | 
T86 | 
2 | 
 | 
T15 | 
3 | 
| zero_val | 
lower_val | 
auto[0] | 
461 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T20 | 
1 | 
 | 
T34 | 
1 | 
| zero_val | 
lower_val | 
auto[1] | 
82 | 
1 | 
 | 
 | 
T35 | 
4 | 
 | 
T86 | 
1 | 
 | 
T8 | 
1 | 
| zero_val | 
zero_val | 
auto[0] | 
218 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T7 | 
1 | 
 | 
T35 | 
1 | 
| zero_val | 
zero_val | 
auto[1] | 
111 | 
1 | 
 | 
 | 
T7 | 
2 | 
 | 
T35 | 
3 | 
 | 
T86 | 
1 |