Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	5726	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	5999	1			T1	19		T2	19		T35	30
len_5001_7500	10777	1			T1	18		T2	18		T35	30
len_2501_5000	6696	1			T1	18		T2	18		T35	30
len_1025_2500	3924	1			T1	11		T2	11		T35	16
len_769_1024	5803	1			T1	2		T2	2		T20	9
len_513_768	6215	1			T1	2		T2	2		T20	17
len_257_512	12734	1			T1	2		T2	2		T20	8
len_0_256	136394	1			T1	274		T2	274		T20	9
len_keccak_block_sizes[72]	504	1			T1	2		T2	2		T35	3
len_keccak_block_sizes[104]	414	1			T1	2		T2	2		T35	3
len_keccak_block_sizes[136]	307	1			T1	2		T2	2		T35	3
len_keccak_block_sizes[144]	221	1			T35	3		T9	1		T65	3
len_keccak_block_sizes[168]	151	1			T35	3		T65	3		T188	3
len_1	551	1			T1	2		T2	2		T35	3
len_0	937	1			T1	2		T2	2		T35	3