Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	619	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	4987	1			T20	8		T7	2		T34	19
len_601_800	11310	1			T20	17		T7	4		T34	63
len_401_600	7575	1			T20	8		T7	4		T34	34
len_201_400	8142	1			T20	3		T34	17		T37	17
len_65_200	33387	1			T20	4		T35	685		T34	11
len_min_for_xof_require_squeeze	443	1			T35	9		T9	1		T65	10
len_keccak_block_sizes[72]	358	1			T35	9		T15	2		T65	5
len_keccak_block_sizes[104]	340	1			T35	9		T65	5		T188	9
len_keccak_block_sizes[136]	357	1			T35	9		T72	3		T64	1
len_keccak_block_sizes[144]	123	1			T72	1		T15	2		T65	5
len_keccak_block_sizes[168]	117	1			T65	5		T189	5		T190	1
len_datapath_width	13624	1			T35	9		T34	1		T36	3
len_2_63	119849	1			T1	374		T2	374		T20	1
len_1	50	1			T8	1		T141	1		T191	2