Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	5708	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6182	1			T3	38		T36	24		T39	41
len_5001_7500	10895	1			T1	33		T3	36		T36	24
len_2501_5000	6775	1			T1	34		T3	36		T36	24
len_1025_2500	3961	1			T1	20		T3	22		T36	14
len_769_1024	5846	1			T1	4		T3	4		T7	32
len_513_768	6239	1			T1	3		T3	4		T7	39
len_257_512	12222	1			T1	4		T3	52		T7	32
len_0_256	131801	1			T1	148		T3	2017		T17	9
len_keccak_block_sizes[72]	521	1			T1	2		T3	3		T7	1
len_keccak_block_sizes[104]	409	1			T3	3		T36	2		T189	2
len_keccak_block_sizes[136]	313	1			T3	3		T190	2		T191	3
len_keccak_block_sizes[144]	217	1			T3	3		T18	1		T42	1
len_keccak_block_sizes[168]	135	1			T3	3		T191	3		T192	1
len_1	532	1			T1	2		T3	3		T36	2
len_0	895	1			T1	2		T3	3		T34	2