Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	6056	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6492	1			T2	17		T33	38		T38	23
len_5001_7500	11196	1			T1	33		T2	17		T33	36
len_2501_5000	6917	1			T1	34		T2	17		T33	36
len_1025_2500	4122	1			T1	20		T2	10		T33	22
len_769_1024	5587	1			T1	4		T2	2		T3	25
len_513_768	5985	1			T1	3		T2	2		T3	33
len_257_512	12231	1			T1	4		T2	2		T3	24
len_0_256	142420	1			T1	148		T2	290		T3	41
len_keccak_block_sizes[72]	525	1			T1	2		T2	2		T3	1
len_keccak_block_sizes[104]	425	1			T2	2		T33	3		T87	2
len_keccak_block_sizes[136]	325	1			T2	2		T3	1		T33	3
len_keccak_block_sizes[144]	240	1			T2	2		T33	3		T87	2
len_keccak_block_sizes[168]	151	1			T33	3		T18	1		T125	1
len_1	569	1			T1	2		T2	2		T33	3
len_0	961	1			T1	2		T2	2		T33	3