Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	5973	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6508	1			T2	7		T34	26		T35	30
len_5001_7500	11526	1			T2	22		T3	33		T34	70
len_2501_5000	6996	1			T2	5		T3	34		T34	11
len_1025_2500	4122	1			T2	4		T3	20		T34	5
len_769_1024	5891	1			T3	4		T7	36		T8	6
len_513_768	6246	1			T3	3		T7	45		T8	7
len_257_512	12998	1			T3	4		T7	40		T8	9
len_0_256	146016	1			T2	5		T3	148		T18	94
len_keccak_block_sizes[72]	519	1			T3	2		T35	3		T36	2
len_keccak_block_sizes[104]	424	1			T35	3		T36	2		T37	2
len_keccak_block_sizes[136]	312	1			T35	3		T37	2		T64	3
len_keccak_block_sizes[144]	233	1			T35	3		T37	2		T64	3
len_keccak_block_sizes[168]	166	1			T7	1		T35	3		T64	3
len_1	557	1			T3	2		T18	1		T32	1
len_0	957	1			T2	2		T3	2		T18	4