Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	665	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5176	1			T2	6		T7	28		T8	6
len_601_800	11866	1			T2	18		T7	59		T8	9
len_401_600	7843	1			T2	9		T7	36		T8	5
len_201_400	9527	1			T2	5		T7	14		T8	7
len_65_200	36864	1			T2	2		T18	55		T30	40
len_min_for_xof_require_squeeze	488	1			T30	1		T35	9		T63	1
len_keccak_block_sizes[72]	375	1			T35	9		T64	5		T166	5
len_keccak_block_sizes[104]	368	1			T32	1		T35	9		T62	1
len_keccak_block_sizes[136]	374	1			T18	2		T32	2		T35	9
len_keccak_block_sizes[144]	138	1			T64	5		T167	1		T130	1
len_keccak_block_sizes[168]	138	1			T64	5		T102	1		T166	5
len_datapath_width	13703	1			T3	246		T18	3		T30	3
len_2_63	125656	1			T2	1		T18	36		T30	27
len_1	45	1			T30	1		T32	1		T168	1