Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	577	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5244	1			T1	29		T6	15		T37	12
len_601_800	11943	1			T1	72		T6	27		T37	30
len_401_600	7910	1			T1	49		T6	17		T37	28
len_201_400	8394	1			T1	19		T6	8		T34	251
len_65_200	30726	1			T1	16		T6	15		T34	680
len_min_for_xof_require_squeeze	397	1			T34	10		T38	1		T159	1
len_keccak_block_sizes[72]	306	1			T34	5		T188	9		T189	9
len_keccak_block_sizes[104]	306	1			T34	5		T62	1		T21	1
len_keccak_block_sizes[136]	314	1			T34	5		T188	9		T189	9
len_keccak_block_sizes[144]	134	1			T34	5		T41	1		T142	1
len_keccak_block_sizes[168]	129	1			T1	1		T34	5		T190	5
len_datapath_width	13645	1			T1	1		T3	246		T6	3
len_2_63	114155	1			T1	5		T6	61		T34	1329
len_1	52	1			T191	2		T192	1		T193	2