Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	7578	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	7749	1			T1	17		T31	37		T14	18
len_5001_7500	13025	1			T1	45		T31	103		T14	37
len_2501_5000	8050	1			T1	8		T31	20		T14	5
len_1025_2500	4779	1			T1	2		T31	9		T14	6
len_769_1024	6115	1			T1	36		T2	39		T7	19
len_513_768	6578	1			T1	47		T2	42		T7	19
len_257_512	13921	1			T1	36		T2	42		T7	22
len_0_256	187414	1			T1	71		T2	32		T3	15
len_keccak_block_sizes[72]	618	1			T34	2		T65	3		T48	2
len_keccak_block_sizes[104]	523	1			T34	2		T65	3		T84	2
len_keccak_block_sizes[136]	413	1			T33	1		T65	3		T84	2
len_keccak_block_sizes[144]	322	1			T31	1		T65	3		T84	2
len_keccak_block_sizes[168]	208	1			T65	3		T190	3		T193	3
len_1	637	1			T34	2		T65	3		T48	2
len_0	1096	1			T1	4		T31	6		T34	2