Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	622	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5454	1			T1	48		T2	24		T7	11
len_601_800	12145	1			T1	83		T2	57		T7	24
len_401_600	8302	1			T1	70		T2	43		T7	15
len_201_400	14110	1			T1	22		T2	17		T7	11
len_65_200	48725	1			T1	16		T2	4		T3	5
len_min_for_xof_require_squeeze	664	1			T31	1		T14	1		T65	9
len_keccak_block_sizes[72]	466	1			T65	9		T190	5		T38	1
len_keccak_block_sizes[104]	462	1			T65	9		T190	5		T194	3
len_keccak_block_sizes[136]	461	1			T31	1		T14	1		T65	9
len_keccak_block_sizes[144]	231	1			T190	5		T193	5		T195	5
len_keccak_block_sizes[168]	226	1			T3	1		T190	5		T191	1
len_datapath_width	13751	1			T1	3		T2	1		T14	13
len_2_63	157610	1			T1	29		T2	38		T3	10
len_1	47	1			T64	1		T38	1		T194	1