Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	376	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2706	1			T37	11		T13	22		T75	32
len_5001_7500	6623	1			T37	47		T13	75		T75	88
len_2501_5000	1639	1			T37	8		T13	17		T75	22
len_1025_2500	925	1			T37	5		T13	8		T75	6
len_769_1024	5320	1			T2	37		T3	7		T8	10
len_513_768	5973	1			T2	46		T3	7		T8	7
len_257_512	5990	1			T2	38		T3	8		T8	9
len_0_256	20082	1			T2	50		T3	12		T8	7
len_keccak_block_sizes[72]	46	1			T2	1		T200	1		T106	1
len_keccak_block_sizes[104]	31	1			T33	1		T201	1		T202	1
len_keccak_block_sizes[136]	30	1			T2	1		T100	1		T42	1
len_keccak_block_sizes[144]	25	1			T80	1		T15	1		T203	1
len_keccak_block_sizes[168]	30	1			T19	1		T42	1		T101	1
len_1	70	1			T35	2		T13	2		T42	1
len_0	519	1			T35	1		T13	7		T75	9