Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	678	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5428	1			T2	21		T3	4		T8	6
len_601_800	12388	1			T2	59		T3	14		T8	8
len_401_600	8183	1			T2	29		T3	5		T8	6
len_201_400	4337	1			T2	15		T3	3		T8	6
len_65_200	8187	1			T2	6		T33	1		T34	4
len_min_for_xof_require_squeeze	86	1			T204	1		T161	1		T205	1
len_keccak_block_sizes[72]	82	1			T42	1		T206	1		T207	1
len_keccak_block_sizes[104]	75	1			T35	1		T13	1		T208	1
len_keccak_block_sizes[136]	77	1			T35	2		T13	1		T206	2
len_keccak_block_sizes[144]	45	1			T38	1		T205	1		T110	1
len_keccak_block_sizes[168]	47	1			T161	2		T209	1		T187	1
len_datapath_width	1035	1			T8	1		T35	5		T13	6
len_2_63	14753	1			T2	15		T3	2		T8	2
len_1	60	1			T205	1		T210	2		T110	1