Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	234	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2452	1			T16	19		T30	11		T37	17
len_5001_7500	5853	1			T16	18		T30	38		T37	43
len_2501_5000	1477	1			T16	18		T30	8		T37	7
len_1025_2500	901	1			T16	11		T30	2		T37	8
len_769_1024	5152	1			T3	13		T16	2		T7	3
len_513_768	5535	1			T3	14		T16	2		T7	3
len_257_512	6048	1			T3	8		T16	2		T7	2
len_0_256	19832	1			T3	12		T7	6		T30	9
len_keccak_block_sizes[72]	29	1			T31	1		T32	1		T55	1
len_keccak_block_sizes[104]	39	1			T31	1		T32	1		T8	1
len_keccak_block_sizes[136]	41	1			T31	1		T32	1		T33	1
len_keccak_block_sizes[144]	32	1			T31	1		T32	1		T190	1
len_keccak_block_sizes[168]	32	1			T31	1		T32	1		T8	1
len_1	68	1			T31	1		T32	1		T55	1
len_0	448	1			T3	1		T30	3		T31	1