Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	655	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5112	1			T3	6		T7	1		T30	12
len_601_800	11475	1			T3	16		T7	4		T30	28
len_401_600	7713	1			T3	15		T7	6		T30	16
len_201_400	4154	1			T3	3		T7	1		T30	7
len_65_200	7377	1			T3	3		T7	1		T30	3
len_min_for_xof_require_squeeze	82	1			T8	1		T17	1		T191	2
len_keccak_block_sizes[72]	80	1			T192	1		T193	1		T18	1
len_keccak_block_sizes[104]	77	1			T192	3		T193	1		T194	3
len_keccak_block_sizes[136]	74	1			T33	1		T192	3		T194	2
len_keccak_block_sizes[144]	48	1			T190	1		T195	1		T139	1
len_keccak_block_sizes[168]	44	1			T33	1		T193	1		T191	1
len_datapath_width	1051	1			T20	1		T33	2		T78	1
len_2_63	14744	1			T3	14		T16	100		T7	11
len_1	54	1			T21	1		T192	1		T196	1