Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	261	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2659	1			T2	24		T16	23		T32	19
len_5001_7500	6182	1			T2	46		T16	43		T32	18
len_2501_5000	1456	1			T2	11		T16	6		T32	18
len_1025_2500	933	1			T2	2		T16	6		T32	11
len_769_1024	5612	1			T2	19		T16	5		T32	2
len_513_768	6013	1			T2	26		T16	1		T32	2
len_257_512	6175	1			T2	21		T16	1		T32	2
len_0_256	20102	1			T1	1246		T2	57		T16	4
len_keccak_block_sizes[72]	42	1			T36	1		T145	1		T95	1
len_keccak_block_sizes[104]	36	1			T36	1		T180	1		T181	1
len_keccak_block_sizes[136]	32	1			T15	1		T145	2		T17	1
len_keccak_block_sizes[144]	33	1			T60	1		T95	1		T182	2
len_keccak_block_sizes[168]	22	1			T9	1		T15	1		T183	1
len_1	69	1			T7	2		T142	2		T184	4
len_0	477	1			T2	6		T7	2		T56	1