Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	420	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2281	1			T32	13		T34	18		T49	34
len_5001_7500	5402	1			T32	30		T34	46		T15	5
len_2501_5000	1344	1			T32	7		T34	12		T15	1
len_1025_2500	778	1			T32	3		T34	4		T15	1
len_769_1024	5409	1			T1	9		T7	5		T34	1
len_513_768	5681	1			T1	19		T7	4		T32	2
len_257_512	5761	1			T1	18		T7	2		T32	3
len_0_256	17140	1			T1	17		T3	105		T7	3
len_keccak_block_sizes[72]	41	1			T3	1		T91	1		T162	1
len_keccak_block_sizes[104]	22	1			T3	1		T48	1		T20	1
len_keccak_block_sizes[136]	37	1			T64	2		T153	1		T163	1
len_keccak_block_sizes[144]	29	1			T8	1		T18	1		T64	1
len_keccak_block_sizes[168]	18	1			T48	1		T8	1		T127	1
len_1	72	1			T3	1		T161	1		T51	1
len_0	385	1			T3	1		T34	2		T49	6