Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	591	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5028	1			T1	11		T7	2		T32	11
len_601_800	11143	1			T1	30		T7	5		T32	16
len_401_600	7573	1			T1	11		T7	3		T32	18
len_201_400	3712	1			T1	5		T7	4		T32	4
len_65_200	6509	1			T1	1		T32	7		T34	7
len_min_for_xof_require_squeeze	63	1			T38	1		T36	1		T91	1
len_keccak_block_sizes[72]	54	1			T16	1		T101	1		T54	1
len_keccak_block_sizes[104]	54	1			T37	1		T126	1		T101	2
len_keccak_block_sizes[136]	61	1			T126	1		T69	1		T164	1
len_keccak_block_sizes[144]	30	1			T8	1		T49	1		T21	1
len_keccak_block_sizes[168]	29	1			T165	1		T166	5		T167	1
len_datapath_width	941	1			T32	1		T49	3		T126	1
len_2_63	13915	1			T1	41		T3	105		T7	7
len_1	45	1			T101	2		T168	1		T69	1