Group : kmac_env_pkg::kmac_env_cov::entropy_timer_cg
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Summary for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 8 0 8 100.00
Crosses 18 0 18 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
entropy_edn_mode_enabled 2 0 2 100.00 100 1 1 2
prescaler_val 3 0 3 100.00 100 1 1 0
wait_timer_val 3 0 3 100.00 100 1 1 0


Crosses for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
entropy_timer_cross 18 0 18 100.00 100 1 1 0


Summary for Variable entropy_edn_mode_enabled

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for entropy_edn_mode_enabled

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54864 1 T1 210 T2 2 T3 274
auto[1] 57906 1 T2 288 T30 4 T31 4



Summary for Variable prescaler_val

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for prescaler_val

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val 28194 1 T1 46 T2 62 T3 65
lower_val 27617 1 T1 66 T2 90 T3 78
zero_val 873 1 T1 1 T2 1 T3 1



Summary for Variable wait_timer_val

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for wait_timer_val

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val 41464 1 T1 100 T2 64 T3 146
lower_val 41950 1 T1 110 T2 84 T3 128
zero_val 29356 1 T2 142 T30 6 T31 4



Summary for Cross entropy_timer_cross

Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 18 0 18 100.00


Automatically Generated Cross Bins for entropy_timer_cross

Bins
prescaler_valwait_timer_valentropy_edn_mode_enabledCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val higher_val auto[0] 6776 1 T1 25 T3 35 T43 18
higher_val higher_val auto[1] 3596 1 T2 11 T9 1 T51 27
higher_val lower_val auto[0] 6760 1 T1 21 T3 30 T43 15
higher_val lower_val auto[1] 3707 1 T2 18 T9 3 T51 37
higher_val zero_val auto[0] 59 1 T11 1 T75 1 T27 1
higher_val zero_val auto[1] 7296 1 T2 33 T31 2 T9 5
lower_val higher_val auto[0] 6729 1 T1 31 T3 44 T43 25
lower_val higher_val auto[1] 3428 1 T2 22 T9 1 T51 17
lower_val lower_val auto[0] 6772 1 T1 35 T3 34 T43 13
lower_val lower_val auto[1] 3589 1 T2 30 T9 1 T49 1
lower_val zero_val auto[0] 45 1 T49 1 T132 1 T42 1
lower_val zero_val auto[1] 7054 1 T2 38 T31 2 T9 5
zero_val higher_val auto[0] 291 1 T1 1 T43 1 T20 1
zero_val higher_val auto[1] 53 1 T74 1 T176 1 T68 1
zero_val lower_val auto[0] 269 1 T3 1 T31 1 T29 2
zero_val lower_val auto[1] 65 1 T68 6 T70 1 T177 1
zero_val zero_val auto[0] 149 1 T2 1 T30 1 T49 1
zero_val zero_val auto[1] 46 1 T74 1 T176 1 T178 2

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