Group : kmac_env_pkg::kmac_env_cov::entropy_timer_cg
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Summary for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 8 0 8 100.00
Crosses 18 0 18 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
entropy_edn_mode_enabled 2 0 2 100.00 100 1 1 2
prescaler_val 3 0 3 100.00 100 1 1 0
wait_timer_val 3 0 3 100.00 100 1 1 0


Crosses for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
entropy_timer_cross 18 0 18 100.00 100 1 1 0


Summary for Variable entropy_edn_mode_enabled

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for entropy_edn_mode_enabled

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54418 1 T1 2 T2 146 T3 6
auto[1] 55514 1 T1 78 T21 142 T43 544



Summary for Variable prescaler_val

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for prescaler_val

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val 27416 1 T1 18 T2 26 T3 2
lower_val 27021 1 T1 16 T2 40 T3 1
zero_val 874 1 T1 1 T2 3 T3 1



Summary for Variable wait_timer_val

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for wait_timer_val

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val 41018 1 T1 14 T2 78 T3 2
lower_val 40472 1 T1 24 T2 68 T3 4
zero_val 28442 1 T1 42 T21 78 T43 298



Summary for Cross entropy_timer_cross

Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 18 0 18 100.00


Automatically Generated Cross Bins for entropy_timer_cross

Bins
prescaler_valwait_timer_valentropy_edn_mode_enabledCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val higher_val auto[0] 6818 1 T2 16 T3 1 T10 10
higher_val higher_val auto[1] 3442 1 T1 2 T21 10 T43 29
higher_val lower_val auto[0] 6655 1 T2 10 T3 1 T28 1
higher_val lower_val auto[1] 3438 1 T1 3 T21 4 T43 22
higher_val zero_val auto[0] 48 1 T113 1 T6 1 T68 1
higher_val zero_val auto[1] 7015 1 T1 13 T21 18 T43 75
lower_val higher_val auto[0] 6599 1 T2 16 T10 17 T4 55
lower_val higher_val auto[1] 3416 1 T1 2 T21 11 T43 25
lower_val lower_val auto[0] 6706 1 T2 24 T3 1 T21 1
lower_val lower_val auto[1] 3367 1 T1 5 T21 10 T43 39
lower_val zero_val auto[0] 48 1 T1 1 T13 1 T65 1
lower_val zero_val auto[1] 6885 1 T1 8 T21 25 T43 68
zero_val higher_val auto[0] 274 1 T2 2 T9 1 T43 1
zero_val higher_val auto[1] 76 1 T47 1 T91 1 T93 2
zero_val lower_val auto[0] 250 1 T2 1 T3 1 T28 1
zero_val lower_val auto[1] 49 1 T13 2 T91 1 T189 1
zero_val zero_val auto[0] 172 1 T1 1 T45 1 T13 2
zero_val zero_val auto[1] 53 1 T91 2 T111 1 T190 2

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