Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_22/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	184	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2651	1			T152	5		T24	12		T153	16
len_5001_7500	6118	1			T152	3		T191	9		T24	23
len_2501_5000	1412	1			T191	3		T24	3		T153	12
len_1025_2500	835	1			T24	2		T153	4		T165	4
len_769_1024	5268	1			T21	18		T10	11		T13	1
len_513_768	5757	1			T21	17		T10	11		T13	1
len_257_512	5973	1			T21	13		T43	16		T45	80
len_0_256	19626	1			T1	40		T2	73		T3	3
len_keccak_block_sizes[72]	37	1			T2	1		T43	1		T45	1
len_keccak_block_sizes[104]	39	1			T43	1		T45	1		T65	1
len_keccak_block_sizes[136]	33	1			T43	1		T45	1		T65	1
len_keccak_block_sizes[144]	34	1			T43	1		T45	1		T65	1
len_keccak_block_sizes[168]	33	1			T21	1		T43	1		T45	1
len_1	73	1			T2	1		T43	1		T45	1
len_0	471	1			T2	1		T43	1		T45	1