Group : kmac_env_pkg::kmac_env_cov::entropy_timer_cg
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Summary for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 8 0 8 100.00
Crosses 18 0 18 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
entropy_edn_mode_enabled 2 0 2 100.00 100 1 1 2
prescaler_val 3 0 3 100.00 100 1 1 0
wait_timer_val 3 0 3 100.00 100 1 1 0


Crosses for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
entropy_timer_cross 18 0 18 100.00 100 1 1 0


Summary for Variable entropy_edn_mode_enabled

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for entropy_edn_mode_enabled

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 52756 1 T1 2 T2 146 T3 6
auto[1] 54658 1 T1 36 T41 288 T30 4



Summary for Variable prescaler_val

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for prescaler_val

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val 26718 1 T1 12 T2 41 T41 66
lower_val 26255 1 T1 6 T2 30 T41 76
zero_val 875 1 T1 1 T2 1 T3 1



Summary for Variable wait_timer_val

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for wait_timer_val

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val 39688 1 T1 6 T2 70 T3 4
lower_val 40198 1 T1 8 T2 76 T3 2
zero_val 27528 1 T1 24 T41 124 T4 80



Summary for Cross entropy_timer_cross

Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 18 0 18 100.00


Automatically Generated Cross Bins for entropy_timer_cross

Bins
prescaler_valwait_timer_valentropy_edn_mode_enabledCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val higher_val auto[0] 6430 1 T2 19 T29 32 T45 29
higher_val higher_val auto[1] 3409 1 T1 1 T41 25 T4 5
higher_val lower_val auto[0] 6648 1 T2 22 T29 27 T10 1
higher_val lower_val auto[1] 3431 1 T1 1 T41 15 T4 4
higher_val zero_val auto[0] 44 1 T31 1 T77 1 T27 1
higher_val zero_val auto[1] 6756 1 T1 10 T41 26 T4 17
lower_val higher_val auto[0] 6369 1 T2 16 T29 43 T45 22
lower_val higher_val auto[1] 3330 1 T1 1 T41 16 T4 9
lower_val lower_val auto[0] 6522 1 T2 14 T29 27 T30 1
lower_val lower_val auto[1] 3379 1 T1 1 T41 18 T30 2
lower_val zero_val auto[0] 51 1 T46 1 T57 1 T26 1
lower_val zero_val auto[1] 6604 1 T1 4 T41 42 T4 19
zero_val higher_val auto[0] 261 1 T1 1 T41 1 T29 1
zero_val higher_val auto[1] 57 1 T50 3 T6 1 T71 2
zero_val lower_val auto[0] 282 1 T2 1 T3 1 T30 1
zero_val lower_val auto[1] 63 1 T41 1 T31 1 T32 2
zero_val zero_val auto[0] 155 1 T46 1 T9 1 T50 1
zero_val zero_val auto[1] 57 1 T41 1 T50 1 T31 1

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