Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_24/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	275	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2596	1			T31	1		T184	8		T148	12
len_5001_7500	6317	1			T31	2		T184	4		T148	23
len_2501_5000	1503	1			T184	2		T148	8		T185	3
len_1025_2500	843	1			T184	2		T148	3		T185	2
len_769_1024	5474	1			T1	6		T9	4		T11	13
len_513_768	5985	1			T1	6		T49	1		T11	15
len_257_512	6100	1			T1	5		T49	1		T9	1
len_0_256	18009	1			T1	2		T2	73		T3	3
len_keccak_block_sizes[72]	38	1			T2	1		T41	1		T45	1
len_keccak_block_sizes[104]	38	1			T41	1		T45	1		T47	1
len_keccak_block_sizes[136]	34	1			T41	1		T47	1		T110	1
len_keccak_block_sizes[144]	28	1			T41	1		T47	1		T110	1
len_keccak_block_sizes[168]	24	1			T110	1		T58	1		T107	1
len_1	64	1			T2	1		T41	1		T29	1
len_0	431	1			T2	1		T41	1		T29	1