Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_26/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	320	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2822	1			T145	18		T161	17		T162	13
len_5001_7500	6698	1			T43	2		T159	3		T145	36
len_2501_5000	1643	1			T159	1		T145	7		T161	9
len_1025_2500	959	1			T159	3		T145	2		T161	7
len_769_1024	5155	1			T12	2		T19	1		T23	1
len_513_768	5864	1			T9	2		T12	1		T19	3
len_257_512	6125	1			T12	2		T19	1		T23	1
len_0_256	17045	1			T3	3		T11	3		T9	1
len_keccak_block_sizes[72]	38	1			T37	1		T46	1		T50	1
len_keccak_block_sizes[104]	34	1			T46	1		T50	1		T113	1
len_keccak_block_sizes[136]	30	1			T12	1		T46	1		T50	1
len_keccak_block_sizes[144]	30	1			T53	1		T201	1		T202	1
len_keccak_block_sizes[168]	25	1			T201	1		T202	1		T198	1
len_1	72	1			T37	1		T46	1		T50	1
len_0	487	1			T37	1		T46	1		T50	1