Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_26/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	642	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5508	1			T9	1		T19	2		T23	1
len_601_800	12329	1			T12	2		T19	1		T43	1
len_401_600	8154	1			T9	1		T12	2		T19	2
len_201_400	4176	1			T9	1		T12	1		T19	1
len_65_200	5909	1			T27	13		T12	1		T19	1
len_min_for_xof_require_squeeze	56	1			T19	1		T203	1		T155	10
len_keccak_block_sizes[72]	57	1			T94	1		T204	5		T155	5
len_keccak_block_sizes[104]	59	1			T94	2		T155	5		T28	2
len_keccak_block_sizes[136]	44	1			T94	2		T54	1		T203	1
len_keccak_block_sizes[144]	34	1			T23	1		T205	1		T206	1
len_keccak_block_sizes[168]	43	1			T27	1		T54	1		T155	5
len_datapath_width	1027	1			T3	3		T11	3		T37	73
len_2_63	14207	1			T9	1		T4	22		T39	3
len_1	50	1			T27	1		T54	3		T203	1