Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_31/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	255	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2487	1			T16	1		T58	7		T144	3
len_5001_7500	6153	1			T65	1		T16	1		T66	2
len_2501_5000	1347	1			T65	2		T66	3		T58	2
len_1025_2500	853	1			T82	2		T144	2		T203	2
len_769_1024	5156	1			T11	1		T12	3		T57	2
len_513_768	5877	1			T11	2		T12	1		T57	4
len_257_512	5890	1			T11	3		T12	1		T57	1
len_0_256	20317	1			T1	3		T2	3		T17	3
len_keccak_block_sizes[72]	42	1			T44	1		T45	1		T53	1
len_keccak_block_sizes[104]	32	1			T53	1		T102	1		T61	1
len_keccak_block_sizes[136]	28	1			T61	1		T136	1		T204	1
len_keccak_block_sizes[144]	29	1			T86	1		T88	1		T15	1
len_keccak_block_sizes[168]	23	1			T57	1		T202	1		T205	1
len_1	84	1			T44	1		T45	1		T53	1
len_0	516	1			T44	1		T45	1		T53	1