Group : kmac_env_pkg::kmac_env_cov::entropy_timer_cg
dashboard | hierarchy | modlist | groups | tests | asserts


Summary for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 8 0 8 100.00
Crosses 18 0 18 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
entropy_edn_mode_enabled 2 0 2 100.00 100 1 1 2
prescaler_val 3 0 3 100.00 100 1 1 0
wait_timer_val 3 0 3 100.00 100 1 1 0


Crosses for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
entropy_timer_cross 18 0 18 100.00 100 1 1 0


Summary for Variable entropy_edn_mode_enabled

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for entropy_edn_mode_enabled

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 56162 1 T11 6 T12 6 T13 146
auto[1] 51678 1 T30 4 T46 4 T29 148



Summary for Variable prescaler_val

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for prescaler_val

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val 26919 1 T12 2 T13 40 T30 2
lower_val 26448 1 T11 2 T12 1 T13 32
zero_val 898 1 T11 1 T12 1 T13 1



Summary for Variable wait_timer_val

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for wait_timer_val

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val 41044 1 T11 4 T12 2 T13 78
lower_val 40918 1 T11 2 T12 4 T13 68
zero_val 25878 1 T30 2 T46 6 T29 52



Summary for Cross entropy_timer_cross

Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 18 0 18 100.00


Automatically Generated Cross Bins for entropy_timer_cross

Bins
prescaler_valwait_timer_valentropy_edn_mode_enabledCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val higher_val auto[0] 6977 1 T12 1 T13 20 T4 11
higher_val higher_val auto[1] 3293 1 T30 1 T29 9 T14 1
higher_val lower_val auto[0] 7012 1 T12 1 T13 20 T4 13
higher_val lower_val auto[1] 3309 1 T29 22 T14 1 T23 1
higher_val zero_val auto[0] 60 1 T29 1 T54 1 T97 1
higher_val zero_val auto[1] 6268 1 T30 1 T29 12 T14 2
lower_val higher_val auto[0] 6773 1 T11 1 T13 17 T9 4
lower_val higher_val auto[1] 3309 1 T29 11 T14 1 T53 15
lower_val lower_val auto[0] 6745 1 T11 1 T12 1 T13 15
lower_val lower_val auto[1] 3212 1 T29 11 T14 1 T23 1
lower_val zero_val auto[0] 53 1 T53 1 T51 1 T184 1
lower_val zero_val auto[1] 6356 1 T30 1 T29 13 T14 2
zero_val higher_val auto[0] 265 1 T12 1 T30 1 T45 1
zero_val higher_val auto[1] 70 1 T51 5 T52 2 T91 1
zero_val lower_val auto[0] 296 1 T11 1 T13 1 T9 1
zero_val lower_val auto[1] 53 1 T31 1 T66 1 T83 4
zero_val zero_val auto[0] 161 1 T46 1 T29 1 T23 1
zero_val zero_val auto[1] 53 1 T31 1 T66 1 T185 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%