Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_03/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	652	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5112	1			T10	5		T14	1		T15	6
len_601_800	11918	1			T9	3		T10	2		T14	1
len_401_600	7745	1			T9	1		T10	4		T14	3
len_201_400	3970	1			T9	1		T10	2		T14	2
len_65_200	6744	1			T29	37		T23	3		T87	96
len_min_for_xof_require_squeeze	63	1			T99	9		T188	1		T189	1
len_keccak_block_sizes[72]	66	1			T87	2		T99	9		T25	1
len_keccak_block_sizes[104]	59	1			T87	1		T103	1		T99	9
len_keccak_block_sizes[136]	81	1			T170	3		T99	9		T190	1
len_keccak_block_sizes[144]	25	1			T29	1		T103	1		T191	5
len_keccak_block_sizes[168]	25	1			T192	2		T191	5		T72	1
len_datapath_width	989	1			T11	3		T12	3		T13	73
len_2_63	14911	1			T30	3		T9	4		T4	18
len_1	56	1			T29	2		T87	1		T193	2