Group : kmac_env_pkg::kmac_env_cov::entropy_timer_cg
dashboard | hierarchy | modlist | groups | tests | asserts


Summary for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 8 0 8 100.00
Crosses 18 0 18 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
entropy_edn_mode_enabled 2 0 2 100.00 100 1 1 2
prescaler_val 3 0 3 100.00 100 1 1 0
wait_timer_val 3 0 3 100.00 100 1 1 0


Crosses for Group kmac_env_pkg::kmac_env_cov::entropy_timer_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
entropy_timer_cross 18 0 18 100.00 100 1 1 0


Summary for Variable entropy_edn_mode_enabled

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for entropy_edn_mode_enabled

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 63008 1 T1 314 T2 2 T3 2
auto[1] 53746 1 T2 208 T3 272 T29 4



Summary for Variable prescaler_val

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for prescaler_val

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val 29057 1 T1 74 T2 64 T3 66
lower_val 28799 1 T1 78 T2 30 T3 73
zero_val 879 1 T1 1 T2 1 T3 1



Summary for Variable wait_timer_val

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for wait_timer_val

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val 44780 1 T1 150 T2 48 T3 64
lower_val 44488 1 T1 164 T2 40 T3 84
zero_val 27486 1 T2 122 T3 126 T29 2



Summary for Cross entropy_timer_cross

Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 18 0 18 100.00


Automatically Generated Cross Bins for entropy_timer_cross

Bins
prescaler_valwait_timer_valentropy_edn_mode_enabledCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
higher_val higher_val auto[0] 7604 1 T1 35 T29 1 T30 1
higher_val higher_val auto[1] 3416 1 T2 16 T3 19 T10 3
higher_val lower_val auto[0] 7937 1 T1 39 T30 1 T12 2
higher_val lower_val auto[1] 3291 1 T2 10 T3 22 T10 1
higher_val zero_val auto[0] 55 1 T2 1 T4 1 T11 1
higher_val zero_val auto[1] 6754 1 T2 37 T3 25 T29 1
lower_val higher_val auto[0] 7763 1 T1 37 T12 5 T13 16
lower_val higher_val auto[1] 3376 1 T2 8 T3 12 T29 1
lower_val lower_val auto[0] 7798 1 T1 41 T12 5 T13 14
lower_val lower_val auto[1] 3156 1 T2 3 T3 22 T10 3
lower_val zero_val auto[0] 61 1 T86 1 T15 1 T34 1
lower_val zero_val auto[1] 6645 1 T2 19 T3 39 T9 2
zero_val higher_val auto[0] 239 1 T1 1 T29 1 T13 1
zero_val higher_val auto[1] 56 1 T14 1 T158 1 T25 1
zero_val lower_val auto[0] 282 1 T30 1 T9 1 T10 1
zero_val lower_val auto[1] 66 1 T14 1 T15 1 T24 1
zero_val zero_val auto[0] 173 1 T2 1 T3 1 T4 1
zero_val zero_val auto[1] 63 1 T158 1 T24 1 T80 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%