Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_08/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	273	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2632	1			T15	2		T117	10		T78	9
len_5001_7500	6511	1			T117	34		T78	10		T24	16
len_2501_5000	1567	1			T117	5		T78	2		T24	2
len_1025_2500	868	1			T117	2		T78	4		T24	3
len_769_1024	5438	1			T10	3		T12	4		T13	4
len_513_768	6000	1			T10	3		T12	2		T13	8
len_257_512	5971	1			T10	7		T12	5		T13	8
len_0_256	22377	1			T1	157		T2	105		T3	137
len_keccak_block_sizes[72]	38	1			T2	1		T3	1		T49	1
len_keccak_block_sizes[104]	33	1			T2	1		T3	1		T49	1
len_keccak_block_sizes[136]	26	1			T3	1		T159	1		T158	1
len_keccak_block_sizes[144]	25	1			T34	1		T159	1		T158	1
len_keccak_block_sizes[168]	30	1			T31	1		T159	1		T158	1
len_1	46	1			T1	2		T2	1		T3	1
len_0	499	1			T1	3		T2	1		T3	1