Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_10/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	250	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2795	1			T150	14		T151	8		T152	4
len_5001_7500	6620	1			T53	1		T150	30		T151	32
len_2501_5000	1496	1			T150	7		T151	5		T152	5
len_1025_2500	904	1			T53	2		T150	4		T151	4
len_769_1024	5534	1			T26	4		T13	7		T14	3
len_513_768	5936	1			T25	1		T10	4		T26	8
len_257_512	5959	1			T25	1		T10	4		T26	6
len_0_256	21354	1			T11	3		T12	3		T17	3
len_keccak_block_sizes[72]	33	1			T47	1		T57	1		T87	1
len_keccak_block_sizes[104]	37	1			T57	1		T87	1		T62	1
len_keccak_block_sizes[136]	24	1			T57	1		T87	1		T195	1
len_keccak_block_sizes[144]	26	1			T87	1		T195	1		T63	1
len_keccak_block_sizes[168]	28	1			T63	1		T196	1		T99	1
len_1	64	1			T47	1		T57	1		T87	1
len_0	535	1			T33	1		T47	1		T57	1