Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_17/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	290	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2881	1			T85	3		T151	1		T152	3
len_5001_7500	6823	1			T85	7		T151	10		T152	7
len_2501_5000	1521	1			T85	3		T151	1		T152	1
len_1025_2500	940	1			T85	3		T152	1		T153	6
len_769_1024	5235	1			T9	16		T12	4		T13	7
len_513_768	5940	1			T9	6		T30	2		T12	3
len_257_512	6074	1			T9	11		T30	1		T12	3
len_0_256	20173	1			T10	3		T9	15		T16	3
len_keccak_block_sizes[72]	35	1			T41	1		T52	1		T78	1
len_keccak_block_sizes[104]	26	1			T52	1		T78	1		T90	1
len_keccak_block_sizes[136]	32	1			T52	1		T191	1		T66	1
len_keccak_block_sizes[144]	26	1			T52	1		T191	1		T144	1
len_keccak_block_sizes[168]	29	1			T192	1		T163	1		T20	1
len_1	60	1			T41	1		T52	1		T78	1
len_0	515	1			T29	1		T41	1		T52	1