Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_23/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	355	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2939	1			T136	13		T137	11		T138	18
len_5001_7500	6922	1			T48	1		T136	27		T137	28
len_2501_5000	1689	1			T48	1		T136	10		T137	3
len_1025_2500	978	1			T48	1		T136	6		T137	3
len_769_1024	5410	1			T11	3		T12	5		T13	1
len_513_768	5993	1			T11	1		T12	3		T22	3
len_257_512	6164	1			T11	2		T12	2		T13	1
len_0_256	17223	1			T1	3		T3	3		T16	3
len_keccak_block_sizes[72]	33	1			T42	1		T47	1		T50	1
len_keccak_block_sizes[104]	31	1			T42	1		T47	1		T50	1
len_keccak_block_sizes[136]	38	1			T47	1		T50	1		T130	1
len_keccak_block_sizes[144]	30	1			T47	1		T50	1		T130	1
len_keccak_block_sizes[168]	27	1			T12	1		T178	1		T179	1
len_1	81	1			T30	1		T42	1		T47	1
len_0	527	1			T30	3		T42	1		T47	1