Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_23/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	707	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5675	1			T12	3		T22	4		T14	12
len_601_800	12659	1			T11	6		T12	9		T22	6
len_401_600	8274	1			T11	1		T12	1		T22	1
len_201_400	3930	1			T12	4		T13	2		T22	1
len_65_200	5995	1			T30	53		T11	1		T74	67
len_min_for_xof_require_squeeze	49	1			T33	1		T180	1		T181	1
len_keccak_block_sizes[72]	49	1			T30	1		T77	1		T68	1
len_keccak_block_sizes[104]	53	1			T30	2		T74	1		T163	1
len_keccak_block_sizes[136]	55	1			T182	1		T183	1		T136	1
len_keccak_block_sizes[144]	30	1			T68	1		T32	1		T23	1
len_keccak_block_sizes[168]	34	1			T163	1		T181	1		T63	1
len_datapath_width	1094	1			T3	3		T16	3		T30	4
len_2_63	14996	1			T1	3		T44	3		T4	41
len_1	43	1			T30	1		T77	2		T68	2