Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	338	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	3065	1			T144	15		T65	6		T145	19
len_5001_7500	7355	1			T72	4		T51	1		T144	33
len_2501_5000	1720	1			T72	1		T144	13		T65	2
len_1025_2500	1041	1			T14	1		T144	4		T65	4
len_769_1024	5547	1			T9	2		T13	12		T14	5
len_513_768	5949	1			T9	2		T13	15		T14	7
len_257_512	6134	1			T9	2		T54	16		T13	12
len_0_256	18822	1			T1	3		T2	3		T12	3
len_keccak_block_sizes[72]	35	1			T38	1		T45	1		T46	1
len_keccak_block_sizes[104]	31	1			T46	1		T47	1		T74	1
len_keccak_block_sizes[136]	39	1			T46	1		T47	1		T74	1
len_keccak_block_sizes[144]	34	1			T74	1		T53	1		T54	1
len_keccak_block_sizes[168]	33	1			T54	1		T23	1		T68	1
len_1	77	1			T38	1		T45	1		T46	1
len_0	552	1			T38	1		T40	1		T45	1