Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_02/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	677	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5829	1			T9	1		T13	10		T14	3
len_601_800	12995	1			T9	1		T72	1		T13	21
len_401_600	8642	1			T9	2		T72	2		T13	16
len_201_400	4146	1			T9	2		T13	4		T14	2
len_65_200	6737	1			T40	20		T75	95		T72	1
len_min_for_xof_require_squeeze	56	1			T83	2		T13	1		T181	9
len_keccak_block_sizes[72]	79	1			T83	2		T181	9		T182	1
len_keccak_block_sizes[104]	66	1			T75	2		T83	1		T181	9
len_keccak_block_sizes[136]	62	1			T83	1		T181	9		T182	1
len_keccak_block_sizes[144]	40	1			T75	1		T83	1		T183	1
len_keccak_block_sizes[168]	39	1			T75	1		T183	1		T144	1
len_datapath_width	1069	1			T2	3		T12	3		T39	3
len_2_63	14976	1			T1	3		T40	13		T9	7
len_1	53	1			T75	2		T83	1		T183	3