Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_08/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	402	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2888	1			T45	1		T156	12		T166	4
len_5001_7500	6679	1			T45	7		T156	30		T166	16
len_2501_5000	1553	1			T156	2		T166	3		T60	4
len_1025_2500	925	1			T26	1		T156	7		T166	2
len_769_1024	5229	1			T8	1		T11	1		T12	8
len_513_768	5612	1			T8	1		T11	5		T12	4
len_257_512	5757	1			T8	1		T11	1		T135	80
len_0_256	19424	1			T1	3		T2	3		T38	73
len_keccak_block_sizes[72]	32	1			T38	1		T44	1		T49	1
len_keccak_block_sizes[104]	39	1			T44	1		T135	1		T146	1
len_keccak_block_sizes[136]	28	1			T44	1		T135	1		T147	1
len_keccak_block_sizes[144]	27	1			T135	1		T13	2		T43	1
len_keccak_block_sizes[168]	21	1			T135	1		T43	1		T121	1
len_1	77	1			T38	1		T41	1		T47	1
len_0	507	1			T38	1		T41	4		T57	3