Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_14/kmac_masked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	252	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2667	1			T120	6		T121	8		T145	1
len_5001_7500	6669	1			T120	13		T121	21		T145	5
len_2501_5000	1511	1			T12	1		T120	1		T121	5
len_1025_2500	892	1			T120	4		T121	2		T146	1
len_769_1024	5366	1			T13	11		T14	12		T69	16
len_513_768	5872	1			T13	17		T14	11		T69	18
len_257_512	6146	1			T13	14		T14	18		T69	10
len_0_256	22279	1			T2	3		T11	3		T16	28
len_keccak_block_sizes[72]	29	1			T51	1		T75	1		T100	1
len_keccak_block_sizes[104]	39	1			T51	1		T100	1		T101	1
len_keccak_block_sizes[136]	32	1			T101	1		T37	1		T180	1
len_keccak_block_sizes[144]	29	1			T181	1		T182	1		T183	1
len_keccak_block_sizes[168]	35	1			T181	1		T179	1		T184	1
len_1	74	1			T50	1		T51	1		T75	1
len_0	500	1			T16	1		T50	2		T51	1