Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	624	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5327	1			T2	18		T7	1		T8	23
len_601_800	11898	1			T2	38		T7	2		T8	47
len_401_600	7932	1			T2	27		T7	1		T8	33
len_201_400	16342	1			T2	8		T8	15		T32	15
len_65_200	74044	1			T1	685		T2	3		T8	5
len_min_for_xof_require_squeeze	998	1			T1	9		T21	1		T57	10
len_keccak_block_sizes[72]	757	1			T1	9		T57	5		T81	5
len_keccak_block_sizes[104]	753	1			T1	9		T34	1		T57	5
len_keccak_block_sizes[136]	756	1			T1	9		T34	2		T57	5
len_keccak_block_sizes[144]	282	1			T32	1		T57	5		T81	5
len_keccak_block_sizes[168]	287	1			T34	1		T57	5		T81	5
len_datapath_width	14120	1			T1	9		T3	246		T8	1
len_2_63	214406	1			T1	1643		T2	66		T33	310
len_1	69	1			T34	1		T110	1		T15	1