Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	7650	1			T20	4		T31	30		T33	24
len_5001_7500	12150	1			T20	22		T31	30		T33	24
len_2501_5000	8900	1			T20	4		T31	30		T33	24
len_1025_2500	5200	1			T20	3		T31	16		T33	14
len_769_1024	4370	1			T20	22		T31	4		T33	2
len_513_768	4300	1			T20	24		T31	2		T33	3
len_257_512	19360	1			T20	30		T31	244		T33	2
len_0_256	258310	1			T20	181		T21	9		T22	9
len_keccak_block_sizes[72]	700	1			T31	3		T33	2		T65	2
len_keccak_block_sizes[104]	650	1			T31	3		T33	2		T65	2
len_keccak_block_sizes[136]	500	1			T31	3		T65	2		T67	2
len_keccak_block_sizes[144]	400	1			T31	3		T65	2		T120	2
len_keccak_block_sizes[168]	350	1			T20	1		T31	3		T39	1
len_1	750	1			T20	1		T31	3		T33	2
len_0	1250	1			T20	5		T31	3		T33	2