Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	746	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5917	1			T13	20		T15	2		T16	1
len_601_800	13607	1			T13	57		T15	10		T16	2
len_401_600	8894	1			T13	38		T15	5		T16	1
len_201_400	16827	1			T13	14		T15	2		T16	2
len_65_200	74957	1			T6	685		T13	27		T17	6
len_min_for_xof_require_squeeze	1011	1			T6	9		T28	1		T157	1
len_keccak_block_sizes[72]	765	1			T6	9		T45	1		T136	9
len_keccak_block_sizes[104]	788	1			T6	9		T95	1		T158	1
len_keccak_block_sizes[136]	761	1			T6	9		T157	1		T136	9
len_keccak_block_sizes[144]	291	1			T13	2		T28	1		T155	5
len_keccak_block_sizes[168]	287	1			T45	1		T46	1		T159	1
len_datapath_width	14447	1			T5	3		T6	9		T13	8
len_2_63	216255	1			T4	390		T5	6		T6	1643
len_1	61	1			T157	1		T160	1		T108	1