LINE 3059
EXPRESSION (addr_hit[59] & reg_we & ((!reg_error)))
------1----- ---2-- -------3------
| -1- | -2- | -3- | Status | Tests |
|---|---|---|---|---|
| 0 | 1 | 1 | Covered | T1,T2,T3 |
| 1 | 0 | 1 | Covered | T1,T2,T3 |
| 1 | 1 | 0 | Covered | T60,T28,T41 |
| 1 | 1 | 1 | Covered | T2,T3,T57 |
LINE 3432
SUB-EXPRESSION (rst_done & shadow_rst_done)
----1--- -------2-------
| -1- | -2- | Status | Tests |
|---|---|---|---|
| 0 | 1 | Covered | T3,T57,T61 |
| 1 | 0 | Covered | T61,T114,T103 |
| 1 | 1 | Covered | T1,T2,T3 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |