Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8991	1			T12	38		T14	38		T18	30
len_5001_7500	14339	1			T12	36		T14	36		T16	3
len_2501_5000	9280	1			T12	36		T14	36		T16	1
len_1025_2500	5464	1			T12	22		T14	22		T18	16
len_769_1024	6347	1			T2	6		T3	13		T12	4
len_513_768	6750	1			T2	5		T3	19		T12	4
len_257_512	21136	1			T2	4		T3	23		T12	52
len_0_256	258067	1			T2	6		T3	24		T12	2017
len_keccak_block_sizes[72]	724	1			T2	1		T12	3		T14	3
len_keccak_block_sizes[104]	617	1			T12	3		T14	3		T18	3
len_keccak_block_sizes[136]	531	1			T12	3		T14	3		T18	3
len_keccak_block_sizes[144]	411	1			T12	3		T14	3		T18	3
len_keccak_block_sizes[168]	327	1			T2	1		T12	3		T14	3
len_1	758	1			T12	3		T14	3		T18	3
len_0	1196	1			T12	3		T14	3		T18	3