Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9219	1			T1	24		T15	10		T16	30
len_5001_7500	14658	1			T1	24		T2	33		T13	33
len_2501_5000	9229	1			T1	24		T2	34		T13	34
len_1025_2500	5443	1			T1	14		T2	20		T13	20
len_769_1024	6627	1			T1	2		T2	4		T3	46
len_513_768	6954	1			T1	3		T2	3		T3	48
len_257_512	21636	1			T1	2		T2	4		T3	48
len_0_256	259576	1			T1	211		T2	148		T3	57
len_keccak_block_sizes[72]	725	1			T1	2		T2	2		T13	2
len_keccak_block_sizes[104]	625	1			T1	2		T16	3		T38	2
len_keccak_block_sizes[136]	519	1			T16	3		T38	2		T105	2
len_keccak_block_sizes[144]	426	1			T3	1		T16	3		T19	1
len_keccak_block_sizes[168]	325	1			T3	1		T15	1		T16	3
len_1	767	1			T1	2		T2	2		T13	2
len_0	1275	1			T1	2		T2	2		T13	2