Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10351 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 9107 1 T2 8 T9 6 T13 32
len_5001_7500 14544 1 T2 12 T9 11 T13 84
len_2501_5000 9283 1 T2 4 T13 24 T19 20
len_1025_2500 5460 1 T9 3 T13 18 T19 12
len_769_1024 6228 1 T1 21 T13 1 T14 13
len_513_768 6441 1 T1 35 T13 3 T14 15
len_257_512 20930 1 T1 35 T2 1 T13 1
len_0_256 259111 1 T1 39 T2 3 T9 2
len_keccak_block_sizes[72] 723 1 T1 2 T113 2 T191 2
len_keccak_block_sizes[104] 619 1 T18 1 T113 2 T191 2
len_keccak_block_sizes[136] 526 1 T113 2 T191 2 T161 3
len_keccak_block_sizes[144] 419 1 T113 2 T191 2 T35 1
len_keccak_block_sizes[168] 319 1 T29 1 T161 3 T192 3
len_1 763 1 T113 2 T191 2 T161 3
len_0 1268 1 T2 2 T9 1 T13 6

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%