Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	635	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5487	1			T1	18		T2	3		T9	2
len_601_800	12543	1			T1	44		T2	9		T9	9
len_401_600	8254	1			T1	33		T2	7		T9	7
len_201_400	16449	1			T1	20		T2	3		T9	3
len_65_200	74437	1			T1	5		T2	2		T9	1
len_min_for_xof_require_squeeze	1006	1			T15	1		T29	1		T161	10
len_keccak_block_sizes[72]	769	1			T14	1		T161	5		T192	5
len_keccak_block_sizes[104]	754	1			T161	5		T192	5		T64	5
len_keccak_block_sizes[136]	756	1			T161	5		T192	5		T64	5
len_keccak_block_sizes[144]	286	1			T161	5		T192	5		T64	5
len_keccak_block_sizes[168]	278	1			T161	5		T192	5		T64	5
len_datapath_width	14205	1			T13	2		T16	3		T19	1
len_2_63	215690	1			T1	63		T2	3		T13	10
len_1	59	1			T27	1		T134	1		T194	1