Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	692	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5618	1			T1	15		T2	21		T3	15
len_601_800	12991	1			T1	33		T2	43		T3	25
len_401_600	8656	1			T1	12		T2	19		T3	18
len_201_400	16660	1			T1	14		T2	18		T3	9
len_65_200	73731	1			T1	1		T2	4		T3	7
len_min_for_xof_require_squeeze	991	1			T79	9		T87	9		T112	1
len_keccak_block_sizes[72]	738	1			T79	9		T87	9		T24	1
len_keccak_block_sizes[104]	744	1			T2	1		T79	9		T87	9
len_keccak_block_sizes[136]	746	1			T79	9		T87	9		T90	1
len_keccak_block_sizes[144]	284	1			T24	1		T183	1		T184	5
len_keccak_block_sizes[168]	282	1			T88	1		T184	5		T168	5
len_datapath_width	14123	1			T1	1		T13	3		T14	1
len_2_63	214655	1			T1	66		T2	7		T3	7
len_1	53	1			T185	2		T186	1		T187	2